mirror/buildroot
1
0
Fork 0
mirror of https://gitlab.com/buildroot.org/buildroot.git synced 2026-08-01 21:23:51 -09:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'next'

Browse Source
This commit is contained in:
Peter Korsgaard
2025-12-12 08:23:49 +01:00
parent 6ddb75786e dc69440be9
commit 148cd0c3c1
337 changed files with 2957 additions and 2952 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
boot/Config.in
View File

@@ -4,7 +4,7 @@ config BR2_TARGET_XILINX_FIRMWARE_ARCH_SUPPORTS
# All Xilinx SoCs using this package are aarch64 only
depends on BR2_aarch64
# only CPUs with corresponding firmwares:
depends on BR2_cortex_a53 || BR2_cortex_a72
depends on BR2_cortex_a53 || BR2_cortex_a72 || BR2_cortex_a78
menu "Bootloaders"

25
boot/xilinx-embeddedsw/Config.in
View File

@@ -1,5 +1,6 @@
comment "xilinx-embeddedsw needs a bare metal toolchain for tuple microblazeel-buildroot-elf"
depends on BR2_TOOLCHAIN_BARE_METAL_BUILDROOT_ARCH != "microblazeel-buildroot-elf"
depends on BR2_TOOLCHAIN_BARE_METAL_BUILDROOT_ARCH != "microblazeel-buildroot-elf riscv32-buildroot-elf"
depends on BR2_TOOLCHAIN_BARE_METAL_BUILDROOT
menuconfig BR2_TARGET_XILINX_EMBEDDEDSW
@@ -21,11 +22,33 @@ if BR2_TARGET_XILINX_EMBEDDEDSW
config BR2_TARGET_XILINX_EMBEDDEDSW_VERSION
string "xilinx-embeddedsw version"
default "xilinx_v2025.1"
default "xilinx_v2025.2"
help
Release version of Xilinx/embeddedsw.
Must be xilinx_v2023.1 or newer.
config BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW
bool "versal2 asufw"
depends on BR2_cortex_a78
help
Build versal2 asufw application from Xilinx/embeddedsw
repo.
https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/asufw
Version must be xilinx_v2025.2 or newer.
config BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM
bool "versal2 plm"
depends on BR2_cortex_a78
help
Build versal2 plm application from Xilinx/embeddedsw repo.
If selected, the xilinx-prebuilt package will not install
the plm.elf since it will come from the xilinx-embeddedsw
package.
https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/versal_plm
Version must be xilinx_v2025.2 or newer.
config BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PLM
bool "versal plm"
depends on BR2_cortex_a72

5
boot/xilinx-embeddedsw/xilinx-embeddedsw.hash
View File

@@ -1,5 +0,0 @@
# Locally calculated
sha256 867b7c7652f754d1a3d6edfe76e53223670e2b4c7e4144d4db1604403d68f616 xilinx-embeddedsw-xilinx_v2025.1.tar.gz
# Locally calculated
sha256 fbee87edd32cf203fdd7925f0bab15c98e2dc1e0d61e70867f1190dc4a605b12 license.txt

36
boot/xilinx-embeddedsw/xilinx-embeddedsw.mk
View File

@@ -30,6 +30,38 @@ XILINX_EMBEDDEDSW_ZYNQMP_PMUFW_CFLAGS = \
"-Os -flto -ffat-lto-objects $(XILINX_EMBEDDEDSW_ZYNQMP_PMUFW_USER_CFLAGS)"
XILINX_EMBEDDEDSW_CFLAGS = "-Os -flto -ffat-lto-objects"
XILINX_EMBEDDEDSW_ASUFW_CFLAGS = "-O2 -ffat-lto-objects -fno-lto"
ifeq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW),y)
define XILINX_EMBEDDEDSW_BUILD_VERSAL2_ASUFW
$(MAKE) -C $(@D)/lib/sw_apps/asufw/src \
COMPILER=$(HOST_DIR)/bin/riscv32-buildroot-elf-gcc \
ARCHIVER=$(HOST_DIR)/bin/riscv32-buildroot-elf-gcc-ar \
CC=$(HOST_DIR)/bin/riscv32-buildroot-elf-gcc \
CFLAGS=$(XILINX_EMBEDDEDSW_ASUFW_CFLAGS)
endef
define XILINX_EMBEDDEDSW_INSTALL_VERSAL2_ASUFW
$(INSTALL) -D -m 0755 $(@D)/lib/sw_apps/asufw/src/asufw.elf \
$(BINARIES_DIR)/asufw.elf
endef
endif # BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_ASUFW
ifeq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM),y)
define XILINX_EMBEDDEDSW_BUILD_VERSAL2_PLM
$(MAKE) -C $(@D)/lib/sw_apps/versal_plm/src/versal_2ve_2vm \
COMPILER=$(XILINX_EMBEDDEDSW_MICROBLAZE_CC) \
ARCHIVER=$(XILINX_EMBEDDEDSW_MICROBLAZE_AR) \
CC=$(XILINX_EMBEDDEDSW_MICROBLAZE_CC) \
CFLAGS=$(XILINX_EMBEDDEDSW_CFLAGS)
endef
define XILINX_EMBEDDEDSW_INSTALL_VERSAL2_PLM
$(INSTALL) -D -m 0755 \
$(@D)/lib/sw_apps/versal_plm/src/versal_2ve_2vm/plm.elf \
$(BINARIES_DIR)/plm.elf
endef
endif # BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM
ifeq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PLM),y)
define XILINX_EMBEDDEDSW_BUILD_VERSAL_PLM
@@ -77,12 +109,16 @@ endef
endif # BR2_TARGET_XILINX_EMBEDDEDSW_ZYNQMP_PMUFW
define XILINX_EMBEDDEDSW_BUILD_CMDS
$(XILINX_EMBEDDEDSW_BUILD_VERSAL2_ASUFW)
$(XILINX_EMBEDDEDSW_BUILD_VERSAL2_PLM)
$(XILINX_EMBEDDEDSW_BUILD_VERSAL_PLM)
$(XILINX_EMBEDDEDSW_BUILD_VERSAL_PSMFW)
$(XILINX_EMBEDDEDSW_BUILD_ZYNQMP_PMUFW)
endef
define XILINX_EMBEDDEDSW_INSTALL_IMAGES_CMDS
$(XILINX_EMBEDDEDSW_INSTALL_VERSAL2_ASUFW)
$(XILINX_EMBEDDEDSW_INSTALL_VERSAL2_PLM)
$(XILINX_EMBEDDEDSW_INSTALL_VERSAL_PLM)
$(XILINX_EMBEDDEDSW_INSTALL_VERSAL_PSMFW)
$(XILINX_EMBEDDEDSW_INSTALL_ZYNQMP_PMUFW)

5
boot/xilinx-embeddedsw/xilinx_v2025.2/xilinx-embeddedsw.hash Normal file
View File

@@ -0,0 +1,5 @@
# Locally calculated
sha256 fb9a705a2974fa4d8d79142baea204d388389b9b37d6f26194b7b759f8978457 xilinx-embeddedsw-xilinx_v2025.2.tar.gz
# Locally calculated
sha256 5ed583a37f9592d4bef73061f14f85c2ca70b8b7a12ffe1ef8ea808fbb764425 license.txt

25
boot/xilinx-prebuilt/Config.in
View File

@@ -17,7 +17,7 @@ if BR2_TARGET_XILINX_PREBUILT
config BR2_TARGET_XILINX_PREBUILT_VERSION
string "prebuilt version"
default "xilinx_v2025.1_update1"
default "xilinx_v2025.2"
help
Release version of Xilinx firmware.
Must be xilinx_v2023.1 or newer.
@@ -26,6 +26,7 @@ choice
bool "family variant"
default BR2_TARGET_XILINX_PREBUILT_VERSAL if BR2_PACKAGE_VERSAL_FIRMWARE # legacy
default BR2_TARGET_XILINX_PREBUILT_VERSAL if BR2_cortex_a72
default BR2_TARGET_XILINX_PREBUILT_VERSAL2 if BR2_cortex_a78
default BR2_TARGET_XILINX_PREBUILT_ZYNQMP
config BR2_TARGET_XILINX_PREBUILT_ZYNQMP
@@ -40,14 +41,21 @@ config BR2_TARGET_XILINX_PREBUILT_VERSAL
bool "versal"
depends on BR2_cortex_a72
config BR2_TARGET_XILINX_PREBUILT_VERSAL2
bool "versal2"
depends on BR2_cortex_a78
help
Version must be xilinx_v2025.2 or newer.
endchoice
config BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA
bool "download a prebuilt Versal XSA"
depends on BR2_TARGET_XILINX_PREBUILT_VERSAL
depends on BR2_TARGET_XILINX_PREBUILT_VERSAL || BR2_TARGET_XILINX_PREBUILT_VERSAL2
help
The Xilinx Support Archive (XSA) provides custom Xilinx
firmware files generated by the AMD Vivado Design Suite.
This option applies to either versal or versal2.
https://docs.amd.com/r/en-US/ug1400-vitis-embedded/Creating-a-Hardware-Design-XSA-File
@@ -60,32 +68,37 @@ config BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA_LOCATION
file. This URL can use any protocol recognized by Buildroot,
like http://, ftp://, file:// or scp://.
When pointing to a local XSA using file://, you may want to
use a make variable like $(TOPDIR) to reference the root of
the Buildroot tree.
When pointing to a local XSA using file:// or simply the
local path, you may want to use a make variable like
$(TOPDIR) to reference the root of the Buildroot tree.
This option applies to either versal or versal2.
endif # BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA
config BR2_TARGET_XILINX_PREBUILT_VERSAL_PLD_PDI
bool "install versal pld.pdi"
depends on BR2_TARGET_XILINX_PREBUILT_VERSAL
depends on BR2_TARGET_XILINX_PREBUILT_VERSAL || BR2_TARGET_XILINX_PREBUILT_VERSAL2
help
When using the Versal Segmented Configuration, there is a
pld.pdi file containing the FPGA bitstream which can be
loaded at run-time. By enabling this option, the pld.pdi
will be installed to the target /lib/firmware/xilinx dir.
This option applies to either versal or versal2.
config BR2_TARGET_XILINX_PREBUILT_FAMILY
string
default "zynqmp" if BR2_TARGET_XILINX_PREBUILT_ZYNQMP
default "kria" if BR2_TARGET_XILINX_PREBUILT_KRIA
default "versal" if BR2_TARGET_XILINX_PREBUILT_VERSAL
default "versal_2ve_2vm" if BR2_TARGET_XILINX_PREBUILT_VERSAL2
config BR2_TARGET_XILINX_PREBUILT_BOARD
string "board name"
default "zcu102" if BR2_TARGET_XILINX_PREBUILT_ZYNQMP
default "kr260" if BR2_TARGET_XILINX_PREBUILT_KRIA
default "vck190" if BR2_TARGET_XILINX_PREBUILT_VERSAL
default "vek385" if BR2_TARGET_XILINX_PREBUILT_VERSAL2
help
Name of Xilinx target board.
Used for installing the appropriate firmware.

5
boot/xilinx-prebuilt/xilinx-prebuilt.hash
View File

@@ -1,5 +0,0 @@
# Locally calculated
sha256 48fd698a16f79b9a828c35ca5b2b50fe832149d1a2938c94c0bb6a2e249b0bed xilinx-prebuilt-xilinx_v2025.1_update1.tar.gz
# Locally calculated
sha256 7b2074b607264a07347e1a7ef0323229585942793469f34b2cf9628f7623e05f LICENSE

29
boot/xilinx-prebuilt/xilinx-prebuilt.mk
View File

@@ -10,6 +10,9 @@ ifeq ($(BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA),y)
XILINX_PREBUILT_FILE = $(call qstrip,$(BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA_LOCATION))
XILINX_PREBUILT_SITE = $(patsubst %/,%,$(dir $(XILINX_PREBUILT_FILE)))
XILINX_PREBUILT_SOURCE = $(notdir $(XILINX_PREBUILT_FILE))
ifeq ($(findstring ://,$(XILINX_PREBUILT_FILE)),)
XILINX_PREBUILT_SITE_METHOD = file
endif
define XILINX_PREBUILT_EXTRACT_CMDS
$(UNZIP) $(XILINX_PREBUILT_DL_DIR)/$(XILINX_PREBUILT_SOURCE) -d $(@D)
endef
@@ -26,16 +29,11 @@ XILINX_PREBUILT_BOARD = $(call qstrip,$(BR2_TARGET_XILINX_PREBUILT_BOARD))
XILINX_PREBUILT_BOARD_DIR = $(@D)/$(XILINX_PREBUILT_BOARD)-$(XILINX_PREBUILT_FAMILY)
ifeq ($(BR2_TARGET_XILINX_PREBUILT_VERSAL),y)
# Common Files for All Versal Families
ifeq ($(BR2_TARGET_XILINX_PREBUILT_VERSAL)$(BR2_TARGET_XILINX_PREBUILT_VERSAL2),y)
ifeq ($(BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA),y)
# Supports either plm.elf or plmfw.elf filenames
XILINX_PREBUILT_PLM = $(@D)/pdi_files/gen_files/plm*.elf
# Unlike the psmfw.elf file for Xilinx development boards,
# AMD Vivado Design Suite currently generates a file named psm_fw.elf.
# Future versions of AMD Vivado will generate a file named psmfw.elf,
# so to support current and future AMD Vivado versions, the filename
# psm*fw.elf is used.
XILINX_PREBUILT_PSMFW = $(@D)/pdi_files/static_files/psm*fw.elf
# We need the *.pdi glob, because the file has different names for the
# different boards, and it has to be named boot.pdi when installed.
# If Segmented Configuration is used, there will be two pdi files and we need
@@ -63,7 +61,6 @@ endif # BR2_TARGET_XILINX_PREBUILT_VERSAL_PLD_PDI
else # BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA
# Supports either plm.elf or plmfw.elf filenames
XILINX_PREBUILT_PLM = $(XILINX_PREBUILT_BOARD_DIR)/plm*.elf
XILINX_PREBUILT_PSMFW = $(XILINX_PREBUILT_BOARD_DIR)/psmfw.elf
# We need the *.pdi glob, because the file has different names for the
# different boards, and it has to be named boot.pdi when installed.
# If Segmented Configuration is used, there will be two pdi files and we need
@@ -91,11 +88,27 @@ endif # BR2_TARGET_XILINX_PREBUILT_VERSAL_PLD_PDI
endif # BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA
ifneq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PLM),y)
ifneq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM),y)
define XILINX_PREBUILT_INSTALL_VERSAL_PLM
$(INSTALL) -D -m 0755 $(XILINX_PREBUILT_PLM) \
$(BINARIES_DIR)/plm.elf
endef
endif # !BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL2_PLM
endif # !BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PLM
endif # BR2_TARGET_XILINX_PREBUILT_VERSAL | BR2_TARGET_XILINX_PREBUILT_VERSAL2
# Files specific to Versal Gen1
ifeq ($(BR2_TARGET_XILINX_PREBUILT_VERSAL),y)
ifeq ($(BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA),y)
# Unlike the psmfw.elf file for Xilinx development boards,
# AMD Vivado Design Suite currently generates a file named psm_fw.elf.
# Future versions of AMD Vivado will generate a file named psmfw.elf,
# so to support current and future AMD Vivado versions, the filename
# psm*fw.elf is used.
XILINX_PREBUILT_PSMFW = $(@D)/pdi_files/static_files/psm*fw.elf
else # BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA
XILINX_PREBUILT_PSMFW = $(XILINX_PREBUILT_BOARD_DIR)/psmfw.elf
endif # BR2_TARGET_XILINX_PREBUILT_VERSAL_XSA
ifneq ($(BR2_TARGET_XILINX_EMBEDDEDSW_VERSAL_PSMFW),y)
define XILINX_PREBUILT_INSTALL_VERSAL_PSMFW

5
boot/xilinx-prebuilt/xilinx_v2025.2/xilinx-prebuilt.hash Normal file
View File

@@ -0,0 +1,5 @@
# Locally calculated
sha256 d292a52ac167631860b5e9a8d8356946289da164ddde4c5393977dc1652dcadb xilinx-prebuilt-xilinx_v2025.2.tar.gz
# Locally calculated
sha256 e7ed8599c0cbf9e28d07883f94ee6ff694f6a702daa56c75b2cf4b30105baecc LICENSE