From cc3de6f10f69c44ea3cb94b20a62f8605ed97006 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 26 Sep 2025 07:57:38 +0200 Subject: [PATCH] configs/aspeed_ast2500evb: select CPU arm1176jzf MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Aspeed AST2500 SoC family embeds a ARM1176JZF 32-bit CPU. See [1]. select this architecture variant for the target. The CPU selection was missing since the defconfig introduction in commit [2]. It was selecting the default value BR2_arm926t. Also, fixes CI this failure: https://gitlab.com/buildroot.org/buildroot/-/jobs/11481238341 WARN: defconfig ./configs/aspeed_ast2500evb_defconfig can't be used: Missing: BR2_TOOLCHAIN_EXTERNAL_BOOTLIN_ARMV6_EABIHF_GLIBC_STABLE=y [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi?h=v6.16.7#n40 [2] https://gitlab.com/buildroot.org/buildroot/-/commit/f089aa9877b0f31bd206714449cf41ade196f8e5 Fixes: 6e5e6f98fd73 ("configs/aspeed_ast2500evb: bump kernel to 6.16.7, check hashes, use bootlin toolchain") Signed-off-by: Cédric Le Goater [Julien: add links in commit log] Signed-off-by: Julien Olivain --- configs/aspeed_ast2500evb_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/aspeed_ast2500evb_defconfig b/configs/aspeed_ast2500evb_defconfig index a955334a91..2ea5ed774e 100644 --- a/configs/aspeed_ast2500evb_defconfig +++ b/configs/aspeed_ast2500evb_defconfig @@ -1,4 +1,5 @@ BR2_arm=y +BR2_arm1176jzf_s=y BR2_TOOLCHAIN_EXTERNAL=y BR2_TOOLCHAIN_EXTERNAL_BOOTLIN=y BR2_TOOLCHAIN_EXTERNAL_BOOTLIN_ARMV6_EABIHF_GLIBC_STABLE=y