From 02f9ae67d9efd8fc0e426e2e2d492016a2499458 Mon Sep 17 00:00:00 2001 From: ghidorahrex Date: Mon, 29 Jun 2026 10:09:09 -0400 Subject: [PATCH 1/4] GP-7015: Corrected rex xchg to nop --- Ghidra/Processors/x86/data/languages/ia.sinc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Ghidra/Processors/x86/data/languages/ia.sinc b/Ghidra/Processors/x86/data/languages/ia.sinc index 7763d811f9..6f0be02112 100644 --- a/Ghidra/Processors/x86/data/languages/ia.sinc +++ b/Ghidra/Processors/x86/data/languages/ia.sinc @@ -4215,7 +4215,7 @@ define pcodeop swap_bytes; :NEG Rmr64 is $(LONGMODE_ON) & vexMode=0 & opsize=2 & byte=0xf7; mod=3 & Rmr64 & reg_opcode=3 { negflags(Rmr64); Rmr64 = -Rmr64; resultflags(Rmr64); } @endif -:NOP is vexMode=0 & byte=0x90 & (mandover=0 | mandover=4 | mandover=1) & (rexprefix=0 | rexWRXBprefix=8) { } +:NOP is vexMode=0 & byte=0x90 & (mandover=0 | mandover=4 | mandover=1) & (rexprefix=0 | rexWRXBprefix=8 | rexWRXBprefix=0) { } :NOP rm16 is vexMode=0 & mandover & opsize=0 & byte=0x0f; high5=3; rm16 ... { } :NOP rm32 is vexMode=0 & mandover & opsize=1 & byte=0x0f; high5=3; rm32 ... { } :NOP^"/reserved" rm16 is vexMode=0 & mandover & opsize=0 & byte=0x0f; byte=0x18; rm16 & reg_opcode_hb=1 ... { } From 6c1352fc90d1340b96e8662bb6e94dfe0c5e18ba Mon Sep 17 00:00:00 2001 From: ghidorahrex Date: Mon, 29 Jun 2026 10:24:13 -0400 Subject: [PATCH 2/4] GP-7016: Corrected VPEXTRW to ignore the VEX.W1 bit --- Ghidra/Processors/x86/data/languages/avx.sinc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Ghidra/Processors/x86/data/languages/avx.sinc b/Ghidra/Processors/x86/data/languages/avx.sinc index 962aee4b1c..59b3dd6f07 100644 --- a/Ghidra/Processors/x86/data/languages/avx.sinc +++ b/Ghidra/Processors/x86/data/languages/avx.sinc @@ -1871,14 +1871,14 @@ define pcodeop vpextrq_avx ; # PEXTRW 4-277 PAGE 1397 LINE 72478 define pcodeop vpextrw_avx ; -:VPEXTRW Reg32, XmmReg2, imm8 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_W0); byte=0xC5; Reg32 & (mod=0x3 & XmmReg2); imm8 +:VPEXTRW Reg32, XmmReg2, imm8 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F) & $(VEX_WIG); byte=0xC5; Reg32 & (mod=0x3 & XmmReg2); imm8 { Reg32 = vpextrw_avx( XmmReg2, imm8:1 ); # TODO Reg64 = zext(Reg32) } # PEXTRW 4-277 PAGE 1397 LINE 72483 -:VPEXTRW Reg32_m16, XmmReg1, imm8 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_W0); byte=0x15; XmmReg1 ... & Reg32_m16; imm8 +:VPEXTRW Reg32_m16, XmmReg1, imm8 is $(VEX_NONE) & $(VEX_L128) & $(VEX_PRE_66) & $(VEX_0F3A) & $(VEX_WIG); byte=0x15; XmmReg1 ... & Reg32_m16; imm8 { Reg32_m16 = vpextrw_avx( XmmReg1, imm8:1 ); # TODO Reg64 = zext(Reg32) From adf16957cf26ad61e9cc386cb57fb92c6b623fb5 Mon Sep 17 00:00:00 2001 From: ghidorahrex Date: Mon, 6 Jul 2026 11:03:47 -0400 Subject: [PATCH 3/4] GP-G770: Corrected MCS-96 CMPL carry flag --- Ghidra/Processors/MCS96/data/languages/MCS96.sinc | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/Ghidra/Processors/MCS96/data/languages/MCS96.sinc b/Ghidra/Processors/MCS96/data/languages/MCS96.sinc index b75988fac0..2ac6ab0650 100644 --- a/Ghidra/Processors/MCS96/data/languages/MCS96.sinc +++ b/Ghidra/Processors/MCS96/data/languages/MCS96.sinc @@ -617,11 +617,7 @@ macro setSignedShiftRightCarryFlag(shiftee,amount) { :CMPL dlreg, lreg is op8=0xc5; lreg; dlreg { op1:4 = lreg; tmp:4 = dlreg - op1; - $(N) = (tmp s< 0); - $(Z) = (tmp == 0); - $(C) = scarry(dlreg, op1); - $(V) = (((dlreg & ~op1 & ~tmp) | (~dlreg & op1 & tmp)) & 0x80000000 ) != 0; - $(VT) = $(VT) | $(V); + subtractFlags(dlreg, op1, tmp); } @endif From 683b8dae88074c629ee2d8a7b69e1c2994d6d0ef Mon Sep 17 00:00:00 2001 From: Fereydoun Memarzanjany Date: Mon, 20 Jul 2026 00:45:01 -0600 Subject: [PATCH 4/4] 9396: Fix unsigned PE export ordinal-table indexes The PE Export Ordinal Table stores unsigned 16-bit indexes into the Export Address Table. Reading these values with readShort() sign-extends entries from 0x8000 through 0xffff, preventing them from matching the nonnegative function index and causing their export names to be lost. --- .../java/ghidra/app/util/bin/format/pe/ExportDataDirectory.java | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Ghidra/Features/Base/src/main/java/ghidra/app/util/bin/format/pe/ExportDataDirectory.java b/Ghidra/Features/Base/src/main/java/ghidra/app/util/bin/format/pe/ExportDataDirectory.java index 54d14c39cf..01bb7df906 100644 --- a/Ghidra/Features/Base/src/main/java/ghidra/app/util/bin/format/pe/ExportDataDirectory.java +++ b/Ghidra/Features/Base/src/main/java/ghidra/app/util/bin/format/pe/ExportDataDirectory.java @@ -314,7 +314,7 @@ public class ExportDataDirectory extends DataDirectory implements StructConverte // See if this function has an associated name exported for it. for (int j = 0; j < numberOfNames; ++j) { - int jthOrdinalVal = reader.readShort(pointerToOrdinals + (j * 2)); + int jthOrdinalVal = reader.readUnsignedShort(pointerToOrdinals + (j * 2)); if (jthOrdinalVal == i) { int jthNameRVA = reader.readInt(pointerToNames + (j * 4)); int jthNamePtr = ntHeader.rvaToPointer(jthNameRVA);